Publication: Chip Design for Intelligent Data Classification Algorithms and Implementation on an FPGA: A Case Study to Classify EMG Signals
| dc.authorscopusid | 43261000900 | |
| dc.authorscopusid | 22953804000 | |
| dc.contributor.author | Alkım, E. | |
| dc.contributor.author | Kilic, E. | |
| dc.date.accessioned | 2020-06-21T09:36:50Z | |
| dc.date.available | 2020-06-21T09:36:50Z | |
| dc.date.issued | 2011 | |
| dc.department | Ondokuz Mayıs Üniversitesi | en_US |
| dc.department-temp | [Alkım] Erdem, Ondokuz Mayis Üniversitesi, Samsun, Turkey; [Kilic] Erdal, Ondokuz Mayis Üniversitesi, Samsun, Turkey | en_US |
| dc.description.abstract | FPGA chips stand out with parallel processing capabilities. Besides this, artificial neural networks require parallel computing because of their algorithm. In this study, it is aimed to design an artificial neural network chip, the designed chip algorithm is implemented on an FPGA chip. Artificial neural network model is chosen as the Learning Vector Quantization (LVQ), and this model is used for the prediction of the four movements (up, down, open, close) from electromyogram (EMG) signals taken from the muscles. In order to create the chip, decision-making algorithm is developed firstly, and this algorithm is finally tested on the ALTERA DE2 demo board by using verilog HDL. © 2011 IEEE. | en_US |
| dc.identifier.doi | 10.1109/SIU.2011.5929649 | |
| dc.identifier.endpage | 310 | en_US |
| dc.identifier.isbn | 9781457704635 | |
| dc.identifier.scopus | 2-s2.0-79960436720 | |
| dc.identifier.startpage | 307 | en_US |
| dc.identifier.uri | https://doi.org/10.1109/SIU.2011.5929649 | |
| dc.language.iso | tr | en_US |
| dc.relation.ispartof | -- 2011 IEEE 19th Signal Processing and Communications Applications Conference, SIU 2011 | en_US |
| dc.relation.journal | 2011 IEEE 19th Signal Processing and Communications Applications Conference, SIU 2011 | en_US |
| dc.relation.publicationcategory | Konferans Öğesi - Uluslararası - Kurum Öğretim Elemanı | en_US |
| dc.rights | info:eu-repo/semantics/closedAccess | en_US |
| dc.title | Chip Design for Intelligent Data Classification Algorithms and Implementation on an FPGA: A Case Study to Classify EMG Signals | en_US |
| dc.title.alternative | Akıllı Veri Sınıflandırma Algoritmaları İçin Yonga Tasarımı ve FPGA Üzerinde Gerçekleme: EMG Sinyallerini Sınıflandırmak İçin Bir Durum Çalışması | en_US |
| dc.type | Conference Object | en_US |
| dspace.entity.type | Publication |
