Chip design for intelligent data classification algorithms and implementation on an FPGA: A case study to classify EMG signals

Abstract

FPGA chips stand out with parallel processing capabilities. Besides this, artificial neural networks require parallel computing because of their algorithm. In this study, it is aimed to design an artificial neural network chip, the designed chip algorithm is implemented on an FPGA chip. Artificial neural network model is chosen as the Learning Vector Quantization (LVQ), and this model is used for the prediction of the four movements (up, down, open, close) from electromyogram (EMG) signals taken from the muscles. In order to create the chip, decision-making algorithm is developed firstly, and this algorithm is finally tested on the ALTERA DE2 demo board by using verilog HDL. © 2011 IEEE.